Physical challenges and novel concepts for the optimization of tunnel FETs
Partners: EPFL, FZJ, IUNET, RWTH, IBM
- Electrostatic doping as a replacement for chemical doping was studied. Buried tri-gate substrates were realized that allow comparing and further investigating nanostructures as materials for TFETs. (RWTH)
- The sensitivity of TFETs on device parameter fluctuations was elaborated and device structures investigated to mitigate device variability. (EPFL, IU-NET)
- Silicon/strained SiGe heterojunction TFETs were realized experimentally and investigated with simulations. (FZJ)
- Electron-hole bilayer TFETs have been studied and it was shown that in principle very steep inverse subthreshold slopes can be achieved due to the stair-case density of states in 2D systems. (EPFL)
- Type II heterojunction TFETs have been investigated experimentally in the InAs-Si heterosystem that show overall a good performance in terms of the trade-offs between high Ion versus small slope and high Ion/Ioff ratio. (IBM)
- • Superlattice energy filter FETs were studied that realize a band-pass filtered Fermi distribution function employing a miniband that is generated with an e.g. InGaAs/InAlAs or InGaAs/InP superlattice. Simulations have shown that the device exhibits inverse subthreshold slopes down to ~10mV/dec and MOSFET-like on-currents. (IU-NET)
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Fig. 1. Schematics of the electron-hole bilayer TFET .
Fig. 2. Transfer characteristics of superlattice energy filter FETs 
Fig. 3. Device structure and TEM image of an InAs-Si heterostructure TFET 
Fig. 4. SEM picture of tri-gate structure 
Fig 5. Schematics of a strained silicon/SiGe heterjunction TFET and transfer characteristics 
- L. Lattanzio, L. De Michielis, and A. M. Ionescu, “Complementary Germanium Electron–Hole Bilayer Tunnel FET for Sub-0.5-V Operation,” IEEE Electron Device Letters, vol. 33, no. 2, pp. 167–169, 2012.
- E. Gnani, P. Maiorano, S. Reggiani, A. Gnudi and G. Baccarani, “Performance Limits of Superlattice-Based Steep-Slope Nanowire FETs”, IEDM 2011, pp. 91-94, 2011.
- K. E. Moselund, H.Schmid, C.Bessire, M.T.Björk, H. Ghoneim, H.Riel, “InAs–Si Nanowire Heterojunction Tunnel FETs”, IEEE Electron Dev. Lett., vol. 33, 1453, 2012.
- J. Knoch and M. Müller, accepted for publication in IEEE Trans. Nanotechnology, 2013.
- Q.T. Zhao, J. Hartmann and S. Mantl, “An improved Si tunnel field effect transistor with a buried strained Si1−xGex source, IEEE Electron DEv. Lett., vol. 32, 1480, 2011.